Basic problem in AD conversion design

The AD program was an attempt to replicate someone else's existing code. After modifying it, I spent about a week debugging it. How could I adjust and debug it? Eventually, with the teacher's guidance, I found the root cause. On one hand, my debugging method was incorrect. On the other hand, my understanding of the datasheet was insufficient. There were several aspects:

1. The debugging method was wrong. I wrote the program myself and then tried to change it to another person's version. The code was very messy, making it hard to find errors. There might be multiple issues, and checking them was difficult.

2. I didn't know how to debug properly. I should have learned to analyze first. When writing a program, I should start by analyzing software errors. If the software is fine, then check for hardware issues. I felt confused during debugging because there was no clear order or approach.

Finally, I identified which function had an error, but I couldn’t fix it. It turned out that my understanding of the datasheet was incomplete—specifically, when SCL is high, SDA becomes valid. The timing was chaotic, leading to incorrect data reading.

Error One:

Right: void slave_NOACK(void) { SDA = 1; // SCL = 1; // This line is crucial. If SCL is set before SDA, the previous SDA value may still be valid, causing unexpected behavior. delayNOP(); SDA = 0; SCL = 0; }

Wrong: void slave_noack() { SCL=1; SDA=1; delayNop(); SDA=0; SCL=0; }

Error Two: The IIC bus initialization was missing. Without it, the IIC might be in an active state, disrupting the AD timing.

Correct: iic_init(); // I2C bus initialization PCF8591_ADC(0x04); If(systemerror == 1) // if there's an error, retry { iic_init(); // I2C bus initialization PCF8591_ADC(0x04); }

Void iic_init() { SCL=0; iic_Stop(); }

Below are the basic problems encountered in the AD conversion design. A total of 82 questions, quite lengthy, and definitely a good read before going to bed!

1. How to choose a signal conditioning device before high-speed analog-to-digital conversion? How to solve the synchronization issue in multi-channel ADC?

The fundamental principle of signal conditioning is to ensure noise and errors introduced are within one LSB of the ADC. An op amp with appropriate performance may be necessary. For multi-channel ADC synchronization, refer to the ADC’s data sheet for detailed information.

2. How to determine internal noise parameters when selecting an ADC?

ADCs typically have SNR or SINAD specifications. Use the formula SINAD = 6.02 * effective bits + 1.66 to evaluate whether the ADC meets your requirements.

3. How to calibrate a pipeline structure ADC? Which parameters need calibration?

Offset and gain errors are usually easier to calibrate. By sampling 0V and full scale, you can derive calibration coefficients. Temperature compensation may require adding a temperature sensor and using lookup tables.

4. What are the recommendations for cabling around ADCs and DACs?

ADCs and DACs are mixed-signal devices. The most important layout consideration is managing analog and digital ground. High-speed ADCs benefit from a solid ground plane, while low-speed ones often use separate grounds connected below the chip.

5. Is there a relationship between ADC accuracy and noise figure (NF)?

Low-speed ADCs express accuracy in terms of peak-to-peak or RMS resolution. High-speed ADCs use SNR and SFDR. However, NF is not a standard parameter for ADCs.

6. If an external analog switch is used, what can be done to reduce resistance-related errors?

Choose switches with low on-resistance, such as ADG14xx series. Add an op-amp after the switch for channel switching. For range switching, select switches with small resistance and consider flatness and temperature drift. Software calibration or programmable amplifiers like AD8250 can also help.

7. Why does the AD7710 output jump when the input is shorted to ground?

Confirm power supply and reference stability. At 25Hz and gain 1, check the data. If the effective resolution is 21.5 bits, the actual peak-to-peak resolution is about 18.8 bits, so a 5-bit fluctuation is normal.

8. How to eliminate interference from the sensor output itself?

If it's common-mode interference, use instrumentation amplifiers like AD8221. For differential mode, filters can help.

9. How to design a 16-channel, 100kSps, 16-bit data acquisition system?

Use two AD7689 (8 channels, 16-bit). Choose an analog switch like ADG1206. Pay attention to on-resistance, charge injection, and on-time.

10. Can a 12-bit ADC be reduced to 8-bit operation for lower accuracy systems?

Yes, just read the top 8 bits of the output.

11. What are the benefits of integrated anti-aliasing filters in some ADCs?

These filters help improve noise immunity, especially for power line frequencies like 50Hz or 60Hz.

12. How to reduce interference between adjacent ADC channels?

Add ground shielding between channels during PCB layout.

13. How to design a high-precision calibration instrument with millivolt DC output?

Use high-precision op-amps from ADI. Quantization noise is inherent and cannot be eliminated. Ensure stable power supply and avoid interference. Zero and gain errors are usually specified in the data sheet.

14. Why does higher internal gain in ADCs lead to more noise?

Higher PGA gain amplifies the noise from the PGA itself, reducing overall resolution.

15. How does power supply ripple affect ADC accuracy?

Use PSRR to calculate its impact. If not available, use the reference source’s PSRR instead.

16. How to handle wiring length, crosstalk, and matching resistors in data converter designs?

High-speed ADCs require careful layout, such as equal-length traces for LVDS signals and proper termination resistors.

17. What is the maximum speed of ADI’s high-speed DACs?

Some DACs reach up to 2.5 GHz, like the AD9739.

18. How to determine internal noise when choosing an ADC?

Look for effective resolution in the ADC’s specs. Ensure noise from the power supply, reference, and front-end conditioning stays within one LSB.

19. Is evaluating SNR through signal hopping at ground reliable?

No, better to use a high-precision reference and perform FFT analysis. Refer to AN-835 for details.

20. What is the significance of slew rate in op-amps?

Insufficient slew rate causes distortion when the output can’t keep up with the input signal.

21. How much does switching power supply ripple affect a 12-bit ADC?

High-precision ADCs like 16-bit and above are not recommended for switching supplies due to noise.

22. Does replacing an LDO with a switching regulator harm a high-speed ADC?

Switching regulators introduce more noise, affecting accuracy. LDOs are preferred for high-speed ADCs.

23. When is impedance matching needed for op-amps?

Only at high frequencies.

24. Can a noisy power supply limit ADC accuracy?

Yes, especially for high-resolution ADCs. A 16-bit ADC requires a low-noise power supply.

25. What filter specs are needed for ADC anti-RF interference?

Design based on your application. Ideal cutoff frequency matches the signal bandwidth, but real filters are compromises.

26. How to suppress input glitches?

Add filters or digitally average samples.

27. Are there software methods to improve ADC accuracy?

Ensure a clean reference and power supply, and minimize noise via layout.

28. What ADC resolution is needed for ECG signals?

Depends on the signal chain. AC-coupled signals can be amplified, allowing 12–16-bit ADCs. DC-coupled signals may require 18–24 bits.

29. Can the 3.3V digital power supply be shared between the DA chip and FPGA in a DDS system?

Yes, if current is sufficient.

30. Will DACs become obsolete with digital video?

No, they are still needed to convert digital signals into human-readable analog form.

31. How to design ADC power supplies for high-temperature environments?

Choose suitable components and manage heat with fans or heatsinks. DC-DC converters can work at 85°C with proper design.

32. Why does the ADuC841 occasionally return zero values?

Check the input signal with an oscilloscope. If it's stable, review the data reading code.

33. How to determine the number of bits that should appear on the ADC output?

Use Vin/Vref = code / 2^N. Consider signed formats like two’s complement.

34. How to reduce noise in the AD7710?

Refer to the evaluation board layout for best practices.

35. How to minimize system noise impact on ADC?

Reduce input noise, power supply noise, and use filters.

36. How do temperature changes affect baseline and ADC accuracy?

Temperature coefficients in the reference chip affect baseline. Most ADCs don’t specify temperature-dependent performance.

37. How to test THD in high-speed ADCs?

Use a high-precision reference, sample, and perform FFT analysis. See AN-835 for details.

38. How to reduce switching power supply noise on ADCs?

Add LC filtering and separate analog/digital grounds. If needed, use LDOs.

39. How to calibrate poor ADC linearity?

Use linear correction. If not enough, try segmentation correction.

40. What are the drawbacks of differential inputs compared to single-ended?

Differential inputs require more complex circuitry.

41. How to determine sampling rate and memory bandwidth in high-speed systems?

Sampling rate depends on the signal frequency. Memory bandwidth depends on the sample rate and processing needs.

42. What filter specs are needed for ADC anti-RF interference?

Design based on your application. Ideal filters pass only useful signals, but practical ones require trade-offs.

43. What are the key specs for converting video signals with a DAC?

Depends on the video format—parallel or HDMI interface. No color space conversion required.

44. What causes ADC output delay?

It depends on the ADC model and internal architecture.

45. How to reduce truncation and gain errors?

Offset and gain errors can be corrected via software.

46. How to eliminate wrong codes in ADC data?

Check if it's an ADC or MCU error. Improve layout and design for reliability.

47. Should the switching power supply ground be separated from the ADC analog ground?

Connect the ADC analog ground to the switching power supply’s filter capacitor ground to reduce ripple effects.

48. What does PSRR mean?

Power Supply Rejection Ratio—how well the ADC rejects power supply noise.

49. Why did the ADC output not match expectations when grounded?

Multiple factors: input signal range, reference voltage, and noise can all contribute.

50. Why can’t ADC quantization noise be eliminated?

Quantization is an approximation, and perfect sampling is unattainable.

51. Which INL/DNL specs are more important for users?

Both are important for different applications.

52. How to connect analog and digital grounds?

Separate them to avoid interference. In high-speed ADCs, they may be connected together for better performance.

53. What should I know about serial ADCs for space-saving designs?

They are slower (<10M), but compact. Check MCU compatibility and signal speed requirements.

54. Do ADC clock signals need temperature or jitter compensation?

No, ADCs usually handle this internally.

55. Should multiple ADCs share a single ground point?

Each ADC should connect to the analog part of the system.

56. When to use FPBW vs. small signal bandwidth?

FPBW relates to the slew rate. Use FPBW = SlewRate / (2π × Vp).

57. How to choose R/C values for isolation?

Consider buffering with an op-amp after RC filtering.

58. What are the most common ADC errors and how to avoid them?

Noise is a major factor. Average multiple readings to reduce errors.

59. How to prevent interference in a 100Hz bandwidth system?

Add a filter at the ADC front end to remove out-of-band noise.

60. What parameters affect ADC performance and how to handle them in PCB design?

Anti-aliasing filters, impedance matching, and signal integrity are key.

61. Can internal ADC references replace external ones?

Internal references may not be as stable. External references are better for high-accuracy systems.

62. What is the maximum sampling rate of 14-bit ADCs?

Up to 150 MSPS.

63. What is DNL discontinuity and how to address it?

It can cause lost codes. No external compensation exists. ADI ADCs guarantee no missing codes.

64. How does switching power supply noise affect ADC errors?

Use LDOs or LC filters. Switching frequency is typically 100kHz–300kHz.

65. Should multiple single-channel ADCs be used instead of a multi-channel one?

Using multiple ADCs reduces cross-channel interference.

66. How to tell if conversion errors come from interference or the ADC itself?

Use a high-precision reference and short the input to test the ADC’s own noise characteristics.

67. Is it beneficial to use LDOs after a switching regulator to reduce noise?

Yes, choose a low-noise LDO.

68. Which ADCs need special attention to EMI suppression?

Most don’t require it, but consider shielding for high-speed clocks or digital devices.

69. What’s the difference between a notch filter and an anti-aliasing filter?

A notch filter blocks specific frequencies, while an anti-aliasing filter acts as a low-pass filter.

70. Does noise aliasing reduce ADC SNR?

Yes, due to improper filtering, noise can fold back into the signal band.

71. How does using an LDO instead of a switching supply affect EMC performance?

Switching power supplies may introduce EMI. LDOs offer cleaner power for ADCs.

72. Is differential measurement better than single-ended for low-frequency signals?

Single-ended is acceptable for very low-frequency signals.

73. Is pulse mode ADC timing control complicated?

Not for the user, as it’s handled via the CPU interface.

74. How to minimize AC loops in PCB layout?

Keep signal return paths as short as possible to reduce loop area.

75. Should a 16-bit ADC be used if the input noise is only 12 bits?

No, it would waste resolution. Choose an ADC that matches your signal quality.

76. How to connect multiple AVCC pins on an ADC package?

Use a power plane and place decoupling capacitors. Newer models like AD7656-1 require less capacitance.

77. Can you recommend low-drift, rail-to-rail op-amps for high precision?

AD8628, AD8638.

78. How to handle power and ground for ADCs and DACs in single-switching power supply systems?

Use magnetic beads to isolate digital and analog power. Prefer separate power chips if possible.

79. Can adding a high-frequency jitter source to the ADC clock increase its effective bits?

It can help, but ensure the reference is correctly connected.

80. How to avoid signal loss during sampling?

Either increase the sampling rate or apply filtering.

81. How to distinguish interference from the front end or power supply?

Short the input and observe the output. If the noise remains, it likely comes from the power supply or reference.

82. Is there a difference in interference handling between high-speed and low-speed ADCs?

Both require similar approaches, but high-speed ADCs often use ground planes and low-speed ones may use separate grounds.