The AD program is designed to imitate an existing program. After making modifications, I spent about a week debugging it. I struggled with how to adjust and debug it effectively. Eventually, with the teacher's guidance, I identified the root cause. On one hand, my debugging approach was incorrect. On the other hand, my understanding of the datasheet was insufficient. There are several key points:
1. The debugging method was wrong. I wrote the program myself and then tried to modify someone else’s code. The code became messy, making it hard to identify errors. Multiple issues could exist, and it was difficult to track them down.
2. I lacked a proper debugging strategy. I should have analyzed the software first. If there were no software errors, I should have checked for hardware problems. I felt confused during the process, without a clear sequence or structure.
Finally, I pinpointed the issue. It turned out that my understanding of the datasheet was incomplete—specifically, the timing between SCL and SDA. When SCL is high, SDA is valid, but the order wasn’t correct. This caused timing confusion and prevented data from being read properly.
Error One:
Correct: void slave_NOACK(void)
{
SDA = 1; //
SCL = 1; // This line is critical. If SCL is set before SDA, the previous SDA state might be considered valid, leading to unexpected behavior.
delayNOP();
SDA = 0;
SCL = 0;
}
Incorrect: void slave_noack()
{
SCL=1;
SDA=1;
delayNop();
SDA=0;
SCL=0;
}
Error Two: The IIC bus initialization was missing. Without it, the IIC might be in an active state, disrupting the timing of the AD conversion.
Correct: iic_init(); // I2C bus initialization
PCF8591_ADC(0x04);
If(systemerror == 1) // has an error, retry
{
iic_init(); // I2C bus initialization
PCF8591_ADC(0x04);
}
Void iic_init()
{
SCL=0;
iic_Stop();
}
This summary covers the basic problems in AD conversion design. There are 82 points in total, which can be quite lengthy. It might even help you fall asleep! 
1. How to choose the signal conditioning device before high-speed analog-to-digital conversion; how to solve the synchronization problem of multi-channel analog-to-digital conversion?
The most fundamental principle of signal conditioning before ADC is that the noise and error caused by signal conditioning must stay within one LSB of the ADC. To achieve this, an op amp with appropriate specifications may be necessary. For multi-channel ADC synchronization, the data sheet of the high-speed ADC usually provides information on multi-chip synchronization. Review that section for guidance.
2. How to determine the internal noise parameter when selecting an ADC?
Typically, the ADC provides SNR (Signal-to-Noise Ratio) or SINAD (Signal-to-Noise-and-Distortion). SINAD = 6.02 * effective bits + 1.66. Use this formula to assess whether your chosen ADC meets your requirements.
3. How to calibrate the pipeline structure ADC? Which parameters need to be calibrated?
Offset and gain errors are generally easier to calibrate. By sampling 0V and full scale externally, you can obtain the calibration coefficients. If temperature compensation is needed, adding a temperature sensor and using a lookup table can help.
4. What are the recommendations for cabling around the ADC and DAC?
ADCs and DACs are hybrid devices. The most important layout consideration is handling analog and digital ground. For high-speed devices, a single ground plane is recommended. For low-speed devices, separate analog and digital grounds, connecting them below the chip. Specific layout details are often provided in evaluation board designs.
5. Is there any necessary connection between the accuracy of the analog-to-digital converter and the noise figure?
ADC accuracy is expressed in terms of peak-to-peak resolution and RMS resolution. Some Sigma-delta ADCs from ADI provide RMS resolution metrics. However, noise figure (NF) is not typically listed as a standard ADC parameter.
6. If an external analog switch is used, some resistance will inevitably introduce errors. How can these be reduced?
Choose switches with low resistance, such as the ADG14** series. For channel switching, add an op amp after the switch. For range switching, select switches with low resistance and good flatness and temperature drift. For high precision, consider software calibration or programmable amplifiers like AD8250/1/3.
7. After short-circuiting the input of the AD7710 to its own ground, the AD conversion value jumps significantly. How to solve this?
Check the stability of the power supply and reference voltage. At 25Hz and gain of 1, check the data in your test. According to Table II, the effective resolution is 21.5 bits, so the actual peak-to-peak resolution is 18.8 bits. A 5-bit jump is normal.
8. How to eliminate interference from the sensor output itself when connected to the ADC input?
If the sensor output has common-mode interference, use instrumentation op amps like AD8221/0 to filter it. For differential mode interference, use filters to remove it.
9. Designing a 16-channel data acquisition system with 100k samples per channel and 16-bit resolution. What ADC chips are suitable?
There are no 16-bit, 16-channel ADCs. You can use two AD7689 (16-bit, 8 channels) or a 16:1 ADG1206. Pay attention to parameters like on-resistance, charge injection, and on-time.
10. Can a 12-bit high-speed ADC be reduced to 8 bits for use if the system only needs 8 bits?
Yes, you can read only 8 bits of the data, but keep in mind that the full 12-bit ADC still contributes to noise and dynamic range.
11. What are the benefits of ADCs with integrated anti-aliasing filters?
These filters reduce noise and improve the ADC’s ability to reject unwanted frequencies. For example, sigma-delta ADCs often include notch filters for 50Hz or 60Hz power line interference.
12. How to reduce interference between adjacent channels?
Add ground shielding between adjacent channels during layout and routing.
13. Designing high-precision calibration instruments, such as DC voltage output (millivolts), what chips are recommended?
Use high-precision op amps from ADI. Quantization noise is inherent and cannot be eliminated. Ensure stable power supplies and avoid wiring interference. For small signals, ensure accurate zero-point and full-scale calibration.
14. Why does higher internal gain in ADCs lead to more noise?
Higher PGA gain increases the noise from the PGA itself, which is then amplified by the ADC. This reduces the effective resolution.
15. What effect does power supply ripple have on conversion accuracy?
Use the PSRR (Power Supply Rejection Ratio) of the ADC to calculate the impact. If not available, refer to the reference source’s PSRR.
16. How to handle wiring length, communication crosstalk, and matching resistance in data converter design?
For high-speed ADCs, ensure equal-length traces for LVDS signals and place termination resistors. Refer to evaluation boards for layout guidance.
17. What is the maximum speed of high-speed digital-to-analog conversion in ADI products?
Our DACs can reach up to 2.5 GHz, such as the AD9739 current-output type, with no impact on stability.
18. If the ADC’s nominal bit count is high but internal noise limits the actual performance, how to evaluate the internal noise?
High-precision ADCs often specify effective resolution. Consider power supply noise, reference noise, and front-end conditioning circuit noise, keeping them within one LSB.
19. How to evaluate SNR when it’s difficult to measure directly?
Use a high-precision reference signal, perform FFT analysis, and refer to application note AN-835 for high-speed ADCs.
20. What is the significance of the slew rate indicator?
If the slew rate is too low, the output cannot follow the input signal, causing distortion.
21. How much does switching power supply ripple affect a 12-bit ADC?
High-precision ADCs like 16-bit or above are not recommended to use switching power supplies due to their sensitivity to ripple and noise.
22. Does replacing an LDO with a switching regulator negatively impact high-speed ADCs?
Switching regulators introduce more noise and ripple, which can degrade ADC performance. For high-speed applications, LDOs are preferred for better SNR and SFDR.
23. When should impedance matching be considered for op amps?
Impedance matching is primarily needed at high frequencies.
24. Can power supply accuracy affect ADC accuracy?
Yes, especially for high-bit ADCs. A noisy power supply can prevent achieving the desired resolution.
25. What performance indicators should an anti-RF interference filter for ADCs meet?
Depends on the application. Ideally, the cutoff frequency matches the useful signal bandwidth, and the roll-off is as steep as possible, though practical limitations apply.
26. How to suppress input "glitch"?
Add filters or digitally filter the sampled results.
27. Any software suggestions to improve ADC accuracy and bit count?
Ensure high-quality reference and power supply, and carefully manage layout to minimize noise.
28. What resolution is needed for ECG signal AD conversion?
Depends on the signal chain. AC-isolated systems can amplify the signal, allowing 12–16 bits. DC-isolated systems may require 18–24 bits for better resolution.
29. Can the 3.3V digital power supply be shared between DA and FPGA chips in an AD9777-based system?
Yes, as long as current is sufficient and power integrity is maintained.
30. Will digital-to-analog converters become obsolete with the rise of digital video signals?
No, because digital signals must be converted to analog for human perception.
31. How to design ADC power supplies for harsh environments, such as high temperatures?
Choose appropriate components and design to keep the system within safe operating ranges, possibly using fans or heat sinks.
32. Why does the ADUC841 sometimes return zero values?
Use an oscilloscope to monitor the input signal. If it’s stable, check the ADC reading program for errors.
33. How to determine the number of digits on the ADC output when a DC signal is applied?
Use the formula Vin/Vref = code/2^N. For negative voltages, consider two's complement coding. Most ADC data sheets provide a mapping chart.
34. How to use the calibration function in the AD7710 manual to reduce noise?
Refer to the evaluation board layout for guidance.
35. How to minimize system noise impact on ADC?
Reduce input noise, power supply noise, and implement appropriate filtering.
36. How does temperature affect baseline and conversion accuracy?
Baseline drift is typically specified in ppm/°C. ADCs generally don't provide temperature-related performance tests.
37. How to perform THD testing on high-speed ADCs?
Use a high-precision reference source, sample with the ADC, and perform FFT analysis. See AN-835 for detailed steps.
38. How to reduce switching power supply noise on ADCs?
Add LC filtering, separate digital and analog grounds, and consider low-noise LDOs if necessary.
39. If ADC transfer function linearity is poor, how to calibrate and verify it?
Perform linear correction. If not sufficient, use segmentation correction.
40. Why do many ADCs still use single-ended inputs despite differential advantages?
Differential inputs require more complex peripheral circuits compared to single-ended.
41. How to determine sampling rate and memory bandwidth in high-speed data acquisition systems?
Sampling rate is based on the signal frequency. Memory bandwidth depends on the sample rate and processing capabilities.
42. What are the typical performance indicators for ADC anti-RF filters?
Depends on the application. Ideally, pass only the useful bandwidth, but practical compromises are needed.
43. What are the key specs for converting video signals with a DAC?
Depends on the video format and interface type (e.g., parallel or HDMI).
44. What causes output delay in ADCs?
It varies by ADC model and is defined in the datasheet.
45. How to reduce truncation and gain errors?
Offset and gain errors can be corrected via software calibration.
46. How to eliminate wrong codes in collected data?
First, confirm if it’s an ADC or MCU error. If it’s the former, check layout and system design.
47. Should the switching power supply ground be separated from the ADC’s analog ground?
Connect the ADC’s analog ground to the switching power supply’s filter capacitor ground to reduce ripple effects.
48. What does PSRR mean?
PSRR stands for Power Supply Rejection Ratio.
49. Why did the ADC output not match expectations when grounded?
Many factors can cause this, including input signal range, reference voltage, and noise effects.
50. Why can’t ADC quantization noise be eliminated?
Quantization noise is inherent due to the discrete nature of digital sampling.
51. Which is more important: INL or DNL for users?
Both are important for different aspects of ADC performance.
52. How should analog and digital grounds be connected?
Separate them to avoid interference, but in high-speed ADCs, they may share a common point.
53. What should be considered when choosing a serial ADC for space-saving?
Serial ADCs are typically lower speed (<10M), but offer compact packaging. Check the MCU interface compatibility.
54. Are clock signal jitter and temperature compensation needed for ADCs?
Most ADCs handle this internally, so no external compensation is required.
55. When multiple ADCs are on a board, should they all connect to the same analog ground?
Each ADC should connect to the analog part of the system, but grounding strategies vary depending on the design.
56. When to use FPBW vs. small-signal BW?
FPBW is related to the slew rate. FPBW = SlewRate / (2π × Vp), where Vp is the output signal amplitude.
57. How to choose R and C values for isolation in ADC design?
Consider adding a buffer op amp after RC filtering for better performance.
58. What are the most common errors in data converters and how to avoid them?
Noise is a major factor. Average multiple readings to reduce noise impact.
59. How to solve anti-interference issues when the desired bandwidth is 100Hz and the amplifier has 1kHz bandwidth?
Add a filter at the ADC front end to block out-of-band noise.
60. What are the key parameters affecting ADC performance and how to avoid issues in PCB design?
Focus on anti-aliasing filters, impedance matching, and signal integrity.
61. Is it better to use an external reference instead of an internal one in ADCs?
External references are preferred for high-accuracy systems, as internal references can affect the ADC’s power supply and SNR.
62. What is the maximum sampling rate for ADI’s ADCs with more than 14-bit resolution?
14-bit ADCs can reach up to 150 MSPS.
63. What is DNL discontinuity and how to handle it?
DNL discontinuity can lead to lost codes. No external compensation is possible—this is an inherent ADC characteristic. ADI guarantees no missing codes.
64. How much does switching power supply ripple affect ADC conversion errors?
Use LDOs or LC filters to reduce ripple. For 16-bit ADCs, switching power supplies are less ideal due to higher noise sensitivity.
65. Should multiple single-channel ADCs be used instead of a multi-channel ADC for better performance?
Using multiple single-channel ADCs is better to avoid cross-channel interference.
66. How to distinguish between interference and conversion errors?
Use a high-precision reference source to short the input and test the ADC’s noise characteristics.
67. Is it beneficial to use LDOs after a switching regulator to reduce high-frequency interference?
Yes, a low-noise LDO can help reduce high-frequency noise.
68. Which types of ADCs need special attention to EMI suppression during wiring?
Generally, focus on power supply and clock lines. High-speed devices may require shielding.
69. What is the difference between a notch filter and an anti-aliasing filter?
A notch filter attenuates specific frequencies, while an anti-aliasing filter acts as a low-pass filter to prevent aliasing.
70. Does noise aliasing reduce ADC SNR?
Yes, if the signal frequency is below half the sampling rate, aliasing makes filtering difficult, reducing SNR.
71. How does using LDOs instead of switching power supplies affect EMC performance?
EMC performance depends on the switching power supply’s design. Poorly handled switching power supplies can cause EMI issues.
72. For very low-frequency signals (less than 10 Hz), is differential measurement better than single-ended?
Single-ended measurement is sufficient for very low frequencies.
73. Is pulse mode ADC timing control complicated?
From the user perspective, it’s straightforward to control the ADC via the CPU.
74. How to minimize AC loop area to reduce noise?
During layout, try to make the return path of the signal as close as possible to minimize loop area.
75. Should a 16-bit ADC be used if the front-end signal noise is only 12 bits?
If the noise cannot be reduced, a 16-bit ADC is unnecessary.
76. How to connect multiple AVCC pins on ADC packages like the AD7656?
Use a power plane and distribute capacitors properly. Newer models like AD7656-1 require fewer capacitors.
77. Recommend high-precision op amps with low-temperature drift and rail-to-rail operation.
AD8628, AD8638.
78. How to power ADCs and DACs with a single switching power supply?
Use magnetic beads to isolate digital and analog power. Prefer separate power chips for analog and digital supplies if possible.
79. Can adding a high-frequency jitter source to the ADC clock increase the effective number of bits?
It can, but be cautious with reference connections.
80. How to avoid signal loss during sampling?
Increase the sampling rate or use filtering techniques.
81. How to determine if interference comes from the front end or the power supply?
Short the input and observe the output. If interference remains, it likely comes from the power supply or reference.
82. Is there a difference in interference handling between high-speed and low-speed ADCs?
Both require filtering, but high-speed ADCs often use ground planes, while low-speed ADCs may use separate grounds.
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