Coal is a basic industry that is related to the sustainable development of the national economy. With the development of the national economy, the demand for coal in various industries is increasing. How to ensure the safe, efficient and sustainable development of coal production is very important. As a widely used physical earth exploration method, seismic exploration can be applied to mine exploration, which can detect the fault, collapse column, goaf shape, direction, influence range and top and bottom coal thickness and surrounding rock loose circle. The content of the project provides timely and accurate prediction parameters for geological anomalies occurring in the coal mine production process to ensure safe and efficient coal production. Therefore, it is of great significance to develop a seismic exploration instrument suitable for mines. However, seismic exploration requires high performance for data acquisition and processing systems. It is difficult to meet the requirements of real-time, multi-channel synchronization and instrument portability of the system using traditional single-chip microcomputers or DSPs.
SOPC technology integrates the modules necessary for system design such as CPU, memory, and I/O interface on a single FPGA. It is a new system design technology. This design method has the functions of short development cycle, flexible design, cut-off, expandable, scalable, and hardware and software programmable in the system, especially suitable for the design of complex systems.
This paper presents a design scheme of a data acquisition and processing system based on SOPC. The system uses 24-bit A/D converter chip to realize multi-channel seismic data front-end acquisition. Using FPGA's parallel and high-speed operation features, FPGA is used to replace traditional DSP chip, and parallel data signal synchronization processing is designed to improve the real-time and synchronization of the system. Sex. The system has been successfully applied to mine seismic exploration and has achieved good results.
1 system hardware implementation
The data acquisition and processing system is mainly for data collection and processing of the obtained data. The system adopts SOPC technology, and the soft core processor N IOS II is used as the control core. The N IOS II CPU and each IP module are connected by the Avalon on-chip bus. The system schematic is shown in Figure 1. The system is mainly composed of four hardware modules: data acquisition module, data processing module, data storage module and data communication module. The data acquisition module mainly uses 24-bit high-precision A/D chip for seismic data acquisition; the data processing module mainly uses FPGA to implement each DSP algorithm; the data storage module adopts SDRAM; the data communication module uses RS232 serial communication, which is responsible for uploading data to the upper position. Displayed on the machine.
Figure 1 System schematic
1. 1 NIOS II CPU
The Nios II family of soft-core processors is Altera's second-generation FP2GA embedded processor, a user-configurable general-purpose Risc embedded processor that extends the performance of the world's most popular soft-core embedded processors. Users can choose from three processors (fast, standard, economical) and more than 60 IP cores. The Nios II system provides users with the most basic versatility that designers can use to create the most suitable The embedded system they need. This design uses a standard N IOS II CPU and calls the interface IP such as SDRAM controller and asynchronous serial port URAT (RS_232 Serial port).
1. 2 data acquisition module
The data acquisition module adopts multi-channel synchronous acquisition. The basic principle is shown in Figure 2: 4-channel synchronous acquisition, each channel consists of signal front-end conditioning circuit, analog-to-digital conversion sampling circuit and A/D interface.
The conditioning of the collected signal is mainly for signal filtering and signal amplification processing: after the geophone collects the relevant data, the passive low-pass filter is used to remove the high-frequency unwanted signal to prevent subsequent digital filtering from generating spectral aliasing; The high-speed feedback amplifier OPA1632D achieves amplification of the input analog data. For the sampling circuit, the 24-bit A/D7766 chip, which operates at a data rate of 125 kHz with a dynamic range of 108 dB, is 3 dB higher than competing devices with the same output data rate, making it ideal for seismic acquisition. Low power consumption and the identification of weak signal requirements in large signals.
Figure 2 Schematic diagram of the data acquisition module
1. 3 data processing module
An important idea of ​​SOC system is IP multiplexing. Therefore, this paper makes full use of ALTERA's rich DSP IP core resources to improve product development efficiency and realize parallel synchronization processing of multi-channel data.
1. 3. 1 digital filter module
For seismic exploration, the effective seismic signals received by the detector have multiple frequency characteristics. In order to better understand the geological conditions of the field technicians, it is necessary to see the signals of a specific range of frequency bands, so it is necessary to design a band pass filter with multiple frequency bands. The filtering module calls Altera's F IR IP core to generate the filter. By setting the parameters, the filter with different requirements can be realized.
The filtering module diagram generated by this system is shown in Figure 3. Cofe_set is the filtering selection signal, which can be supplied to the cofe_set value command through N IOS II to complete the passband filtering of four different bandwidths.
Figure 3 filter module diagram
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