The CPU consists of an arithmetic logic unit (ALU) and a control unit. The ALU performs arithmetic operations, logical operations, and bit-level manipulations. The control unit manages timing and control signals, includes an instruction register, a decoder, an address pointer, and a program counter (PC).
Outside the CPU, there are various peripheral components such as clock circuits, ROM, RAM, timer/counter units, parallel I/O ports, serial interfaces, and an interrupt system. These components work together to support the CPU in executing instructions and managing data flow.
IO ports, commonly known as GPIOs (General Purpose Input/Output), are four 8-bit special function registers (SFRs) in the microcontroller. They can be configured as either input or output ports. When used as outputs, they have internal latches that retain the last written value, even if the external circuit tries to pull the pin low. This means that when you write a '1' to an IO port, the latch holds it, but the actual voltage on the pin may vary depending on external conditions.
In the case of the 51 MCU, P0 requires an external pull-up resistor when used as an output, while P1, P2, and P3 are quasi-bidirectional ports. Some ports, like P0, can also serve as data or address buses, with P0 handling both data and address signals. P2 is typically used for high-order address lines, and P3 has additional secondary functions, such as serial communication or external interrupts.
It's important to understand the difference between reading the pin directly and reading the latch. If an output is set to '1', but the external circuit pulls it low, reading the pin would give a different result than reading the latch. To avoid this, when modifying bits of an I/O port, the MCU reads the current state of the latch, modifies it in the ALU, and then writes the updated value back to the port. Common bit manipulation instructions like ANL, ORL, XRL, CLR, and SETB are used for this purpose.
When reading the actual pin level, it’s necessary to first write a '1' to the port to disable any internal drive, allowing the external signal to be read accurately. This is especially important in applications where the pin might be connected to an external device.
The distinction between standard bidirectional I/O and quasi-bidirectional I/O is significant. A true bidirectional port can output both high and low levels and present a high-impedance state when idle. However, the P1, P2, and P3 ports in the 51 MCU have internal pull-up resistors, so they cannot achieve a high-impedance state in input mode, making them quasi-bidirectional. The P0 port, on the other hand, behaves as a true bidirectional port when operating in its second function mode, allowing both high and low outputs without needing external pull-ups.
Note that sink current capability is generally higher than pull-up current, which is why LEDs are often driven using sink current rather than source current.
Interrupts are essential for real-time processing, allowing the CPU to respond to events without continuously polling. Common terms include internal and external interrupts, interrupt service routines (ISR), priority levels, nesting, and vector addresses. Interrupts help synchronize fast CPUs with slower peripherals, enable real-time control, and allow for immediate fault detection and handling.
The 51 MCU has three main interrupt sources: external interrupts 0 and 1, timers 0, 1, and 2, and the serial port. External interrupts can be triggered by either a level or edge, depending on configuration. Key interrupt-related registers include TCON, SCON, IP, and IE, which control interrupt flags, enable/disable settings, and priority levels.
The serial interrupt flag must be cleared manually through software, and if an external interrupt is level-triggered and not cleared, it may retrigger after the ISR completes. Interrupt responses are blocked during the execution of RETI or when accessing IE and IP registers. This ensures that the CPU does not miss critical instructions.
Timers and counters in the 51 MCU are 16-bit registers, with two in the 51 model and three in the 52 model. The TMOD register controls the working mode, while the TCON register manages start/stop and interrupt flags.
Internal RAM in the 51 MCU is typically 128 bytes, with 16 bytes accessible via direct addressing. The compiler usually handles memory allocation, and RAM is used for temporary data storage during program execution. Internal ROM is generally 4KB, storing the compiled program code (bin file) from Keil.
External memory can be expanded up to 64KB for both RAM and ROM, using the I/O ports. This allows for more complex programs and larger data storage beyond the microcontroller’s built-in capabilities.
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